Icarus Verilog
Icarus Verilog is a Verilog compiler that generates a variety of engineering formats, including simulation. It strives to be true to the IEEE-1364 standard.
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| Filename | Size | Changed |
|---|---|---|
| iverilog.changes | 0000003411 3.33 KB | |
| iverilog.spec | 0000002150 2.1 KB | |
| verilog-0.9.7.tar.gz | 0001238088 1.18 MB |
Revision 1 (latest revision is 2)
Stephan Kulow (coolo)
committed
(revision 1)
osc copypac from project:openSUSE:Factory package:iverilog revision:d7c5f0a1622379f7f7a50fe116bf5ebf, using expand
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